AMD 6nm Ryzen 6000 'Rembrandt' SoC Deep Dive: Gunning For Alder Lake

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Zen 3+, 6nm TSMC and RDNA 2 collide

AMD whipped the covers off of its promising Ryzen 6000 'Rembrandt' mobile processors at CES 2022, with standout features including the new Zen 3+ CPU architecture and RDNA 2 integrated graphics fabbed on TSMC's 6nm node. Today marks the launch of the inaugural 35W HS-series models that attack the thin-and-light market and can boost up to 5.0 GHz on the flagship model. AMD also introduced a new Radeon 600M Series branding for its integrated graphics.

AMD is quite scathing in its assessment of Intel's new Alder Lake processors, calling into question the company's x86 hybrid approach as it claims the Ryzen 6000 chips have better performance, performance-per-watt, and battery life. AMD's representatives were clear in our briefings: They believe that Ryzen 6000's Zen 3+ cores offer more power efficiency than Alder Lake's Efficiency cores and more performance than its Performance cores, but all with one group of eight high-performance Zen 3+ cores that AMD claims have a superior dynamic range.

AMD also believes that Intel will have scalability issues as it moves down from the 110W "max effort" notebooks we saw in early reviews into 35W, 28W, and 15W notebooks that serve the vast majority of the market. So naturally, AMD believes this will result in performance and battery life advantages for Ryzen 6000. In fact, AMD even claims that Intel has to use efficiency cores because it can't cram eight performance cores into 28W and 15W ultrathin notebooks, while Ryzen 6000 offers eight full-performance cores across its full product stack. AMD claims that Intel continues to face issues because it hasn't actually fixed its process node issues.

AMD's claims are bold, but the company is obviously aware that it will have to back those statements up with its shipping products. That begins today with the first wave of 200+ Ryzen 6000 designs that will work their way to market over the next several months. 

Above, we can see the HS-series models that come to market with the first wave, along with the HX- and U-series models that arrive in March. AMD has carved these into three swim lanes based on device form factor/thickness. Notably, the last slide shows the three refreshed Ryzen 5000 'Cezanne' models that are included in the Ryzen 6000 family (bottom of the table).

Ryzen 6000 brings a slew of technological advancements that all begin with AMD's focus on thin-and-light machines that are 18mm thicker or less, a strategy that aims to cater to what the company says is the fastest-growing segment and serves 85% of the market. According to AMD, this segment prizes battery life just as much as performance and wants leading performance wrapped in a thin and light chassis that can serve multiple uses, as opposed to the focus on sheer performance that we see with the halo 'Ultra Enthusiast' class machines for gamers and creators. In fact, AMD says some of the thin-and-light models will eventually provide up to 24 hours of battery life (as measured by video playback), though we shouldn't expect to see those until the May to June timeframe (they require an 'optimized set of components').

With a focus on maximum performance density, AMD transitioned the chips to the 6nm TSMC process and relied heavily on power optimizations instead of increasing IPC or making microarchitectural changes. However, the move from 7nm to 6nm allows the company to cram in more features per square millimeter of silicon — TSMC’s 6nm process offers up to 18% higher logic density than the 7nm “N7” process, but similar power and performance metrics.

Paired with fine-grained power improvements, drastically improved I/O like DDR5/LPDDR5, and the new RDNA 2 engine that features higher peak clock speeds and IPC over the prior-gen Cezanne chips, the Ryzen 6000 'Rembrandt' chips look to wring impressive gains out of the new revamped Zen 3+ architecture. Here's how they did it, plus some of the company's benchmarks. 

Five Layers of Power 

AMD focused its power refinements on the five optimization points listed in the above slide. As you can see, AMD claims performance/power/area (PPA) benefits from the TSMC 6nm 'N6' process it used in pursuit of its goal for the most performance-per-watt and performance-per-square-millimeter of silicon. 

The second slide in the above album gives us a look at the SoC topology, with key features including the move from the DDR4/LPDDR4X interface to only DDR5-5200 and LPDDR5-6400 interfaces. Those interfaces connect via dual 128-bit wide memory controllers (two sub-channels). These four 32-bit channels combine to deliver a tremendous throughput advantage over DDR4/X, thus feeding the RDNA 2 engine with much more bandwidth.  

Notably, the lack of support for DDR4 interfaces means that Ryzen 6000 laptops are exposed to higher DDR5 pricing that isn't a good fit for the value end of the market, but AMD says that it will use three refreshed Cezanne models with Vega graphics for lower-end designs. 

We've also included the Ryzen 5000 block diagram in the album for comparison. You'll also notice that Ryzen 6000 includes the new Microsoft Pluton security co-processor, which adds more functionality and "Xbox-class" security in addition to AMD's existing Platform Security Processor (PSP). The PSP still controls firmware authentication for secure boot, mapped I/O during runtime, and a cryptographic engine for security purposes. The Pluton processor steps in for fTPM functionality and additional OS-directed features. 
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