AMD Ryzen 5 9600X AIDA64 cache test confirms increased L1/L2 bandwidth

[harlan4096]

AMD Ryzen 9000 with faster L1/L2 caches

First independent test confirms AMD claims. 



During the Computex Keynote, AMD CEO Dr. Lisa Su introduced a new family of AM5 processors called Ryzen 9000 or “Granite Ridge.” This series features a brand-new Zen5 architecture, which will be available to consumers starting next month.

While the new architecture doesn’t bring major changes to core count or clock speeds, AMD claims increased CPU core performance due to doubled instruction and data bandwidth from L2 to L1 and L1 to FP registers. This claim has not yet been put to the test.


Ryzen 9000 Cache, Source: AMD

We do not know when AMD will lift the review embargo on the Ryzen 9000 series, but it is clear that engineering samples were available to several entities even before the new series was made official. These samples are now being used for testing while new BIOS updates are being polished for existing 600-series and upcoming 800-series motherboards.

Reportedly, someone got their hands on the 6-core Ryzen 5 9600X processor, currently the lowest tier in the new lineup. This processor features a base clock of 3.9 GHz, a boost clock of 5.4 GHz, and comes equipped with 384KB of L1 cache, 6MB of L2 cache, and 32MB of L3 cache. Unlike the 9900X and 9950X, this processor only has one CCD (Core Compute Die).


Ryzen 9 9600X AIDA64 test, Source: HXL/QQ
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