19 April 19, 07:20
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Samsung Foundry this week announced that it has completed development of its first-generation 5 nm fabrication process (previously dubbed 5LPE). The manufacturing technology uses extreme ultraviolet lithography (EUVL) and is set to provide significant performance, power, and area advantages when compared to Samsung’s 7 nm process (known as 7LPP). Meanwhile, Samsung stresses that IP developed for 7LPP can be also used for chips to be made using 5LPE.
5LPE Is Ready (For Sampling)
Samsung’s 5 nm technology continues to use FinFET transistors, but with a new standard cell architecture as well as a mix of DUV and EUV step-and-scan systems. When compared to 7LPP, Samsung says that their 5LPE fabrication process will enable chip developers to reduce power consumption by 20% or improve performance by 10%. Furthermore, the company promises an increase in logic area efficiency of up to 25%.
The contract maker of semiconductors says that it can reuse all existing 7LPP intellectual property on chips designed for 5LPE technology, which will reduce customers' migration costs and shrink product development cycle. Meanwhile, typically IP vendors tend to optimize and verify their IP for new process nodes, so it remains to be seen whether always reusing 7LPP IP blocks for 5LPE chips will be the most optimal solution.
Samsung Foundry said that it has offered 5LPE process design kit (PDK), design methodologies (DM), electronic design automation (EDA) tools, and IP, to its customers since the Q4 of 2018. In addition, the company has started to provide 5LPE multi project wafer (MPW) shuttle service to its clients. Overall, the technology is ready for design starts and sampling, though it should be noted that as is usually the case with these kinds of announcements, risk production and volume production will still be some distance off.